| 摘要 |
PURPOSE:To obtain a circuit with general-purpose and ease of timing change by combining outputs of flip-flop circuits selected by a selection circuit so as to obtain an output. CONSTITUTION:At first, a time chart with a required timing waveform is drawn (figure a) and how many clocks are required in one period is calculated. Then a ring counter having the same number of stages is arranged (figure b), then exclusive OR circuit 3, 4 of the number of the required timing signals and F/F 21, 22 are arranged (figure c), and an output signal of a ring counter stage corresponding to the leading/trailing of the timing signal is selected and inputted to the exclusive OR circuits 3, 4 (figure d). Through the procedure above, even for a timing signal with any perodic waveform, since the time chart is realized mechanically into a circuit diagram, the general purpose application is attained. Moreover, when it is desired to change the timing signal, the exclusive OR input signal has only to be changed into another stage output of the ring counter and flexible change is attained.
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