发明名称 Method for forming an isolation region in an integrated circuit
摘要 A method for forming an isolation region in an integrated circuit is disclosed. The method includes forming a pad layer (12) on a semiconductor substrate (10), and forming an oxidation masking layer (14) on the pad layer, wherein the pad layer relives stress from the oxidation masking layer. Next, the oxidation masking layer and the pad layer are patterned and etched to expose a portion of the substrate. After laterally removing the pad layer to form at least one undercut under the oxidation masking layer, a doped layer (16) is conformably formed on the oxidation masking layer, the pad layer, and the substrate, thereby refilling the undercut with the doped layer. Finally, the doped layer is anisotropically etched to form spacers (16A) on sidewalls of the oxidation masking layer and the pad layer, and the substrate is then thermally oxidized to form the isolation region (18) in the substrate, wherein doping atoms in the doped layer will diffuse into the substrate.
申请公布号 US5985737(A) 申请公布日期 1999.11.16
申请号 US19980034635 申请日期 1998.03.04
申请人 TEXAS INSTRUMENTS - ACER INCORPORATED 发明人 WU, SHYE-LIN
分类号 H01L21/762;(IPC1-7):H01L21/762 主分类号 H01L21/762
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