PARALLEL BACK TRACING FOR FINDING SATISFACTION POSSIBILITY CONCERNING RECONFIGURABLE HARDWARE

摘要

PROBLEM TO BE SOLVED: To package the algorithm of satisfaction possibility on reconfigurable hardware by expressing a circuit with the reconfigurable hardware and parallel back tracing objectives from primary output to primary input along with plural circuit paths. SOLUTION: The description of an original circuit C stored in a memory cell 12 of a system 10 is processed by a mapping program 14, and the model of a new circuit SAT(C) 16 is generated and stored in a circuit 16 for executing algorithm satisfaction possibility in respect to a circuit C12. Reconfigurable hardware 18 is used for virtually generating the circuit SAT(C) and an algorithm SAT of the SAT emulates the SAT(C) in the reconfigurable hardware 18. Thus, the SAT can be executed at an emulation speed without generating costs for the SAT to prepare the accelerator of the hardware or hardware for any other special purpose.