STRUCTURE OF PASSIVATION LAYER OF SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF TO REDUCE DELAY OF TIME CONSTANT CAUSED BY REDUCTION OF CAPACITANCE AND EMBODY EXCELLENT GAP-FILL PERFORMANCE WITHOUT VOID WHEN DESIGN RULE IS DECREASED

摘要

PURPOSE: A structure of a passivation layer of a semiconductor device is provided to reduce a delay of a time constant caused by reduction of capacitance and embody excellent gap-fill performance without a void when a design rule is decreased by using FSG(fluorinated silicate glass) as an oxide material of a passivation layer. CONSTITUTION: An FSG layer(13) is formed on a substrate(11) having a plurality of metal interconnection(12). An ion barrier layer(14) is formed on the FSG layer. A silicon nitride layer(15) is formed on the ion barrier layer. The ion barrier layer is made of a BPSG(boron phosphorous silicate glass) material or a PSG(phosphorous silicate glass) material.