发明名称 Variable length decoder and variable length decoding method
摘要 A variable length decoder comprises: a first storage unit that stores encoded data; a variable length decoding unit; a second storage unit that stores coefficient data; a reverse quantizing unit; and a reverse DCT unit. The variable length decoding unit includes a control unit, a decoding unit, and an address generating unit. The second storage unit includes an initializing mechanism and is initialized all at once by the control unit in advance of decoding in a macro block unit. Only non-zero quantized data decoded by the decoding unit is stored in an address of the second storage unit generated by the address generating unit. The reverse quantizing unit reads and performs reverse quantization of the quantized data from the second storage unit, the reverse DCT unit performs reverse DCT, and then decoded data is acquired.
申请公布号 US7262718(B2) 申请公布日期 2007.08.28
申请号 US20050085064 申请日期 2005.03.22
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 SUGISAWA YUJI
分类号 H03M7/40;H04N7/26;H04N7/50 主分类号 H03M7/40
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