发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To improve the operation speed of a complementary MESFET and simplify its manufacturing processes by a method wherein a p-type channel MESFET is formed on an Si substrate and an n-type MESFET is formed on a GaAs layer formed on a part of the Si substrate. CONSTITUTION:A single crystal GaAs layer is formed on the main surface of a single crystal Si substrate 1 to form a 1st region and the part of the main surface of the single crystal Si substrate 1 on which the single crystal GaAs is not formed is used as a 2nd region. n-type layers 9 and 10 are formed on the parts of the main surface of the GaAs layer forming the 1st region and p-type layers 4 and 5 are formed on the parts of the main surface of the Si substrate forming the 2nd region. Gates 20 composed of amorphous silicon layers doped with at least phosphorous are formed on a part of the n-type layer and a part of the p-type layer respectively to constitute an n-type channel MESFET in the 1st region and a p-type channel MESFET in the 2nd region. As the gate electrodes of both the MESFET's are made of the same material and are formed simultaneously, the number of manufacturing processes of the complementary MESFET can be reduced.
申请公布号 JPS63301567(A) 申请公布日期 1988.12.08
申请号 JP19870134946 申请日期 1987.06.01
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 OGINO TOSHIRO;IMAI KAZUO
分类号 H01L27/095;H01L21/205;H01L21/338;H01L27/08;H01L29/80;H01L29/812 主分类号 H01L27/095
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