发明名称 DICING METHOD OF COMPOUND SEMICONDUCTOR WAFER
摘要 <p>PURPOSE:To make up for a difficult point caused at a scribing method and a blade method which are executed to a dicing line formed on a semiconductor wafer composed of a III-V compound and to obtain a perfect chip without sharply increasing a chip size and by enhancing a material efficiency. CONSTITUTION:At a semiconductor wafer composed of a III-V compound, dicing lines 4, 5 formed on the semiconductor wafer are diced in a direction perpendicular to an orientation flat at (011) by a scribing method after flaws have been formed and a force has been exerted, and the dicing lines which are parallel to the orientation flat at (011) are diced by a blade method. As a result, chippings are not produced and it is not required to form an excess space on the dicing lines 4, 5. Consequently, a material efficiency is increased, and the title method contributes extremely largely to the semiconductor wafer composed of the expensive III-V compound.</p>
申请公布号 JPH04276645(A) 申请公布日期 1992.10.01
申请号 JP19910062550 申请日期 1991.03.04
申请人 TOSHIBA CORP 发明人 IMAMURA SOICHI
分类号 B28D5/00;H01L21/301;H01L21/302;H01S5/02 主分类号 B28D5/00
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