发明名称 |
Nonvolatile, in particular flash-EEPROM, memory device |
摘要 |
<p>A memory (1) comprising a memory array (2), a row decoding unit (3), a column decoding unit (4), and a control unit (7); the memory array presents global bit lines (13) extending along the whole of the array (2) and connected to respective local bit lines (14), one for each of the sectors; a switch (15) is provided between the global bit lines (13) and each respective local bit line (14) to selectively connect a selected global bit line (13) and only one of the associated local bit lines (14); and the switches are controlled by local decoding units (17) over control lines (16), to address the sectors (S1-S12) independently and so perform operations (read, erase, write) simultaneously in two different sectors in different rows and columns. <IMAGE> <IMAGE></p> |
申请公布号 |
EP0745995(A1) |
申请公布日期 |
1996.12.04 |
申请号 |
EP19950830183 |
申请日期 |
1995.05.05 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
CAMPARDO, GIOVANNI;BEDARIDA, LORENZO;FUSILLO, GIUSEPPE;SILVAGNI, ANDREA |
分类号 |
G11C17/00;G11C7/18;G11C8/10;G11C8/12;G11C16/02;G11C16/06;G11C16/10;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C8/00;G11C7/00 |
主分类号 |
G11C17/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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