| 摘要 |
<p>A data channel controller (116) for managing the transport of multiple data streams through a base system interface (18) including a first buffer, a pool memory (34) including a plurality of second buffers, and one or more peripheral devices each having a third buffer. The peripheral devices transport data through their third buffers via a peripheral interface (28, 40, 42, 38) each having predetermined data transfer rate. An arbiter system (26) is coupled to said pool memory (34) for selectively enabling the transfer of data in response to request signals from the peripheral devices and the base system interface provided under predetermined condition with respect to the presence of data in the corresponding third buffer and second buffers.</p> |
