| 摘要 |
PROBLEM TO BE SOLVED: To provide a sample-and-hold circuit in which miniaturization of constitution can be achieved. SOLUTION: This circuit is constituted, so that in a first sampling period, analog data of a high-level side potential is inputted via a FET 7, which is the only P-channel, and is sampled, in a second sampling period, analog data of a low level side potential is inputted though a FET 8 which is the only N-channel, and is sampled.
|
