| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce clock skew that becomes an obstacle to acceleration, to absorb characteristic dispersion of an input buffer to which a reference clock signal is inputted, to improve performance of a clock skew correcting circuit and to accelerate an entire system. SOLUTION: This device provides a delay correcting circuit 126 in the middle of a feedback path which inputs a clock signal to a phase comparator 121 from a clock distribution system 124 which supplies the clock signal through a feedback path 131, detects delay difference between a reference clock signal just before an input buffer of the reference clock signal and a reference clock signal just before the phase comparator, corrects the phase of a clock signal from the feedback path based on the information, inputs the corrected clock to the phase comparator, performs the reference clock and a phase comparison operation and adapts the phase of a normal clock signal to the reference clock signal through a control circuit 122 and a variable delay circuit 123 based on the result.</p> |
