发明名称 DEMODULATION CIRCUIT FOR PSK SIGNAL
摘要 PROBLEM TO BE SOLVED: To reduce power consumption, to enable thinning and to provide high reliability by providing a comparator circuit or the like for detecting the change point of phase by comparing a 1st binarized signal from an amplifier circuit with a frequency divided signal from a frequency divider circuit. SOLUTION: An edge detection circuit 5 has an exclusive OR circuit and by exclusively ORing 1st and 2nd binarized signals, a 3rd binarized signal synthesizing a pulse showing both the ends of 2nd binarized signal with a signal extinguished by suppression through a delay circuit is provided. The frequency of this synthesized 3rd binarized signal is divided by a frequency divider circuit 6, and the frequency divided signal almost close to the carrier wave frequency of source signal is provided. By exclusively ORing this frequency divided signal and the 1st binarized signal through a comparator circuit 7, a 1st detecting signal showing the change of output at the change point of phase is generated. Thus, the PSK signal can be demodulated without using any PLL circuit or tank circuit.
申请公布号 JPH09181784(A) 申请公布日期 1997.07.11
申请号 JP19950334399 申请日期 1995.12.22
申请人 MATSUSHITA ELECTRIC IND CO LTD;TOKIMEC INC 发明人 IIYAMA KEIICHI;TAKAMIYA ITSUO;ARAI MASAYUKI;YAMAZAKI AKIHISA
分类号 G06K19/07;H04L27/22 主分类号 G06K19/07
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