METHOD AND APPARATUS FOR MINIMIZING SEMICONDUCTOR WAFER ARCING DURING SEMICONDUCTOR WAFER PROCESSING

摘要

A method and apparatus for minimizing or eliminating arcing or dielectric breakdown across a wafer (26) during a semiconductor wafer processing step includes controlling the voltage across the wafer (26) so that arcing and/or dielectric breakdown does not occur. By using an electrostatic clamp (50) of the invention and by controlling the specific clamp voltage, the voltage across a wafer is kept below a threshold and thus, arcing and/or dielectric breakdown is reduced or eliminated.