发明名称 CLOCK GENERATOR, AND RECORDING AND REPRODUCING DEVICE
摘要 PROBLEM TO BE SOLVED: To selectively obtain a clock synchronized with reference clock information contained in digital data and a clock of a fixed frequency using a single oscillator. SOLUTION: When a MPEG2-TS from a digital broadcasting tuner is inputted and recorded) on a recording and reproducing device 10, a clock-generating part 90 generates a PLL to obtain the clock synchronized with a PCR included in the MPEG2-TS. The output value of a counter 47 is added to each packet as arrival time information on the packet in the arrival time addition circuit 48, and the MPEG2-TS is recorded on a disk 61. At reproduction, the clock of a fixed frequency of 27 MHz is obtained from a VCXO 91. Arrival time information added to the first packet of the reproduced MPEG2-TS is loaded to the counter 47, and when the output value of the counter 47 matches value of arrival time information added to packets after the second packet, the packets are outputted to the digital broadcasting tuner.
申请公布号 JP2002015527(A) 申请公布日期 2002.01.18
申请号 JP20000193398 申请日期 2000.06.27
申请人 SONY CORP 发明人 TAKESHITA JUN;SATO TOMOYUKI;OBATA KOJI;HONDA TAKESHI
分类号 H04N5/06;G11B20/14;H04N5/92;H04N5/95;(IPC1-7):G11B20/14 主分类号 H04N5/06
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