发明名称 |
Extended poly buffer STI scheme |
摘要 |
A new method of forming shallow trench isolations has been described. A silicon semiconductor substrate is provided. A silicon nitride layer is deposited overlying the substrate. A polysilicon layer is deposited overlying the silicon nitride layer. An oxidation mask is deposited overlying the polysilicon layer. The oxidation mask, polysilicon layer, silicon nitride layer, and the silicon semiconductor substrate are patterned to form trenches for planned shallow trench isolations. The silicon semiconductor substrate exposed within the trenches is oxidized to form an oxide liner layer within the trenches wherein the oxidation mask prevents oxidation of the polysilicon layer. Thereafter the oxidation mask is removed. A trench oxide layer is deposited overlying the liner oxide layer and filling the trenches. The trench oxide layer and the polysilicon layer are polished down stopping at the silicon nitride layer with a polishing selectivity of oxide to polysilicon to nitride of 4:100:1 wherein dishing is avoided to complete shallow trench isolations in the manufacture of an integrated circuit device.
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申请公布号 |
US2002094648(A1) |
申请公布日期 |
2002.07.18 |
申请号 |
US20010759909 |
申请日期 |
2001.01.16 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD. |
发明人 |
LIM VICTOR SENG KEONG;CHEN FENG;CHAN LAP;GOH WANG LING |
分类号 |
H01L21/762;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/762 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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