发明名称 |
Stacked gate MOS structure for multiple voltage power supply applications |
摘要 |
A capacitor structure is formed on a semiconductor substrate to provide split voltages for semiconductor circuits. An active area is formed in the substrate serving as a lower capacitor plate for a bottom capacitor. A thin dielectric layer and field oxide regions are formed on the substrate, and the dielectric layer is covered with a capacitor plate over the active area to complete the bottom capacitor. A thick dielectric layer is formed over the device and a via is formed through the thick dielectric layer to the upper capacitor plate. A second lower plate is formed for a top capacitor. An inter-layer dielectric layer is formed over the second lower plate. An upper capacitor layer is formed over the inter-layer dielectric layer to form a top capacitor with a different capacitance value from the bottom capacitor. The value of the capacitance can be varied by selection of the permittivity and/or thickness of the dielectric layer and by variation of the effective plate area of the top and bottom capacitors.
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申请公布号 |
US6476460(B1) |
申请公布日期 |
2002.11.05 |
申请号 |
US20000514845 |
申请日期 |
2000.02.28 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTING COMPANY |
发明人 |
LIANG MONG-SONG;LEE JIN-YUAN;YOO CHOE-SAN |
分类号 |
H01L21/02;(IPC1-7):H01L29/00 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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