发明名称
摘要 The estimation circuit has N columns and M rows of computation elements (S), each determining an error function between two values. A memory with N by M cells holds values representing the block in which movement is to be estimated. Another N by M memory holds values representing a block in a reference window. The two memories are connected to the associated computation element (S). The values of the error function for each of the columns are accumulated simultaneously in M adders (Add). A set of N by M buffers (B) are connected in series and a band of the reference window propagates itself column by column in the resulting network. The output of each buffer is connected to the input of an error function computation element (S).
申请公布号 KR100437177(B1) 申请公布日期 2004.10.20
申请号 KR19950025805 申请日期 1995.08.18
申请人 发明人
分类号 H04N7/32;G06T7/20 主分类号 H04N7/32
代理机构 代理人
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