| 摘要 |
A circuit for inputting data of a semiconductor memory device is provided to perform normal operation regardless of the variation of fabrication process, temperature and voltage of devices constituting the circuit by controlling the output of data with only a clock. A clock synchronization unit(301-304) outputs an internal enable signal synchronized to a clock. A data selection unit(201-204) selects one of stored data in response to the internal enable signal and internal data synchronized to the clock, and stores and outputs the data selected by being synchronized to the clock. The clock synchronization unit includes a flip flop for outputting the internal enable signal by synchronizing an external enable signal to the clock.
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