发明名称 Resistance and offset cancellation in a remote-junction temperature sensor
摘要 A temperature sensor uses a semiconductor device that has a known voltage drop characteristic that is proportional to absolute temperature (PTAT). A controllable current source is coupled to the semiconductor device and is operable to sequentially inject a bias current having a value I(bias) and fixed ratio N of I(bias) into the semiconductor device. A delta sigma analog to digital converter (ADC) has an input coupled to the semiconductor device. The delta sigma ADC is configured to sample and integrate a sequence of voltages pairs produced across the semiconductor device by repeatedly injecting an ordered sequence of selected bias currents into the semiconductor device. The ordered sequence of selected bias currents comprises M repetitions of (N×I(bias); I(bias)) and one repetition of (M×I(bias); M×N×I(bias)).
申请公布号 US9395253(B2) 申请公布日期 2016.07.19
申请号 US201313931799 申请日期 2013.06.28
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 Ash Mikel K.;Pu Xiao;Park Joonsung;Nagaraj Krishnaswamy
分类号 G01K15/00;G01K7/00;H03M3/00;G01K7/01 主分类号 G01K15/00
代理机构 代理人 Pessetto John R.;Cimino Frank D.
主权项 1. A method for cancelling series-resistance errors in a temperature sensor, the method comprising: measuring a first voltage delta across a semiconductor device having a known voltage drop characteristic that is proportional to absolute temperature (PTAT) by using a delta sigma analog to digital converter (ADC) with double sampling to measure the first voltage delta across the semiconductor device produced by a ratio of current densities using a first bias current having a value of N×I(bias) and a second bias current having a value of I(bias), by repeatedly sampling the voltage drop produced by N×I(bias) during a sample phase of the ADC and sampling the voltage drop produced by I(bias) during an integration phase of the ADC; measuring a second voltage delta across the semiconductor device, produced by a third bias current having a value of M×I(bias) and by a fourth bias current having a value of M×N×I(bias), by repeatedly sampling in reverse order the voltage drop produced by M×I(bias) during a sample phase of the ADC and sampling the voltage drop produced by M×N×I(bias) during an integration phase of the ADC; determining a corrected voltage delta by sampling the first voltage delta M times more often than sampling the second voltage delta, such that the reverse order of the currents used to establish the second voltage delta causes the second voltage delta to be subtracted from M times the first voltage delta resulting in a net voltage delta that is proportional to absolute temperature; and converting the corrected PTAT voltage delta to a temperature value by using a known temperature-dependent voltage drop characteristic of the semiconductor device.
地址 Dallas TX US