发明名称 LEVEL CONTROLLER
摘要 PURPOSE:To always find the optimum slice level to identify an input digital data (digital signal) as a code of '1' or '0' without fail, by obtaining a level correction value corresponding to the error rate of the input digital data. CONSTITUTION:An arithmetic circuit 14 finds an error rate A from A=(counter value (c))/(counter values a+c). The error rate A represents 'a rate of too low level'. Also, an arithmetic circuit 15 finds an error rate B from B=(counter value (d))/(counter values b+d). The error rate B represents 'a rate of too high'. An arithmetic circuit 16 finds a dislocation rate alpha from alpha=1-(B/A). A correction value beta (=Rx beta ) can be found with the dislocation rate alpha and a reference data R, and the correction value beta is added/subtracted on the reference value, then being supplied to a D/A converter 17. The D/A converter 17 converts the correction value beta to an analog offset voltage, then supplying it to an adder 3, and the offset voltage and the reference voltage Eref are added, then being supplied to an input terminal at the other side of a level comparator 2.
申请公布号 JPS62193441(A) 申请公布日期 1987.08.25
申请号 JP19860035682 申请日期 1986.02.20
申请人 VICTOR CO OF JAPAN LTD 发明人 EGURI SHIGEHARU;OMURA KAZUHIKO;KURODA SATORU
分类号 H04N7/08;H03K5/08;H03M5/04;H04L1/00;H04L25/03;H04N7/025;H04N7/03;H04N7/035;H04N7/081 主分类号 H04N7/08
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