发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE:To eliminate a danger of chip edge short-circuit and a chip adhering base short-circuit generated due to long bonding wire or due to careless handling after wire bonding by providing an insulating film integral matter having bonding holes at the surfaces of a semiconductor element and outer leads. CONSTITUTION:An insulating film 8 of an integral matter is provided in the same plane of the surfaces of a semiconductor element 1 and outer leads 6, and the film 8 has bonding holes 9, 10 at positions to be predetermined wire bonded at the sides of the element 1 and outer leads 6. The element 1 and the leads 6 are connected by a bonding wire 4 via the holes 9, 10. For example, the film 8 provided with the holes 9, 10 at the predetermined positions of first and second bondings 5, 7 of bonding pads of the chip 1 is integrally adhered on the same surface as that of stitch 6 of the surface of the chip 1.
申请公布号 JPH02307233(A) 申请公布日期 1990.12.20
申请号 JP19890129167 申请日期 1989.05.22
申请人 NEC CORP 发明人 ITO YOSHIO
分类号 H01L21/60 主分类号 H01L21/60
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