Level adjustment circuit and data output circuit thereof

摘要

A level adjustment circuit of the present invention includes a MOS transistor (4) for pulling up an output node (12), a first inverter (37) for inputting an output data signal (D) and outputting a gate control signal for controlling a gate electrode of the MOS transistor (4), and a second inverter (38) connnected to the MOS transistor (4) in series between the first and second power sources for inputting a signal based on the output data signal (D), and outputting the output node (12). <IMAGE>