发明名称 Analog block and test blocks for testing thereof
摘要 An apparatus relating generally to a system-on-chip is disclosed. In this apparatus, the system-on-chip has at least one analog block, an input/output interface, a data test block, and a processing unit. The processing unit is coupled to the input/output interface to control access to the at least one analog block. The data test block is coupled to the at least one analog block through the input/output interface. The processing unit is coupled to the data test block and configured to execute test code having at least one test pattern. The data test block under control of the test code executed by the processing unit is configured to test the at least one analog block with the test pattern.
申请公布号 US9411701(B2) 申请公布日期 2016.08.09
申请号 US201313802223 申请日期 2013.03.13
申请人 XILINX, INC. 发明人 Azad Sarosh I.
分类号 G01R31/3167;G06F11/27;G01R31/317 主分类号 G01R31/3167
代理机构 代理人 Webostad W. Eric;King John J.
主权项 1. An apparatus, comprising: a system-on-chip having at least one analog block, an input/output interface, and a processing unit; a data test block coupled to the at least one analog block through the input/output interface; and a link test block coupled to the at least one analog block, wherein the link test block comprises a test interface; wherein the processing unit is coupled to the input/output interface to control access to the at least one analog block; wherein the processing unit is coupled to the data test block and configured to execute test code having at least one test pattern; wherein the data test block under control of the test code executed by the processing unit is configured to test the at least one analog block with the test pattern; and wherein the link test block is separately controllable via the test interface to adjust operating parameters of the at least one analog block during the execution of the test code.
地址 San Jose CA US