| 摘要 |
PURPOSE:To reduce the parasitic capacity to be formed between the semiconductor substrate and the semiconductor layer in a semiconductor integrated circuit device and to contrive to enhance the operating speed of the device to a higher speed by a method wherein an isolation structure is constituted by the cavity part, which is provided in the interposing part between the semiconductor substrate and the semiconductor layer. CONSTITUTION:A semiconductor layer 6 is provided on the upper part of a semiconduc tor substrate 5 making a cavity part 7 and an insulating film 8 interpose between the semiconductor layer 6 and the semiconductor substrate 5. The semiconductor layer 6 constitutes an npn type bipolar transistor, for example. Moreover, the semicon ductor layer 6 is provided on the upper part of the semiconductor substrate 5 making the cavity part 7 having gas (air, inactive gas and so forth) with a smaller specific inductivity compared to the semiconductor substrate 5 and the insulating film 8 inter pose between the semiconductor layer 6 and the semiconductor substrate 5 and is constituted in such a way that the parasitic capacity to be added becomes smaller. By providing the cavity part 7 in such a way, the parasitic capacity to be formed between the semiconductor substrate 5 and the semiconductor layer 6 can be reduced, thereby enabling to contrive to enhance the operating speed of the semiconductor integrated circuit device to a higher speed. |
