| 发明名称 |
Address control system for a memory storage device |
| 摘要 |
A memory storage device having an address control system is disclosed. The memory storage device includes memory cells and an address control system configured to decode a bit number which identifies a number of the memory cells which are selected in parallel. The memory cells selected in parallel correspond to least significant bits of an address which has a range that includes the memory cells.
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| 申请公布号 |
US7290118(B2) |
申请公布日期 |
2007.10.30 |
| 申请号 |
US20040754663 |
申请日期 |
2004.01.08 |
| 申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
SMITH KENNETH KAY;BRANDENBERGER SARAH MORRIS;MUNDEN TERREL;PERNER FREDERICK A.;LEMUS CONNIE;MCINTYRE DAVID |
| 分类号 |
G06F12/00;G06F13/28;G11C7/10;G11C8/12 |
主分类号 |
G06F12/00 |
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