发明名称 Phase linearity test circuit
摘要 A circuit includes a phase interpolator and a self test circuit. The phase interpolator is to provide a interpolator output having a phase corresponding to a respective phase step in a plurality of phase steps. The interpolator output is a weighted combination of one or more of a plurality of phasor signals. The self test circuit includes a phase detector coupled to a reference signal and the interpolator output, a phase-difference-to-voltage converter coupled to the phase detector, an analog-to-digital converter (ADC) coupled to the phase-difference-to-voltage converter, and control logic. The phase detector is to generate an output that is proportional to a phase difference between the reference signal and the interpolator output. The phase-difference-to-voltage converter is to convert the output from the phase detector into a corresponding voltage. The ADC is to convert an output from the phase-difference-to-voltage converter into a corresponding digital value. The control logic is to test the phase interpolator using the self-test circuit.
申请公布号 US7307560(B2) 申请公布日期 2007.12.11
申请号 US20060414751 申请日期 2006.04.28
申请人 RAMBUS INC. 发明人 SHI XUDONG;ASSADERAGHI FARIBORZ
分类号 H03M1/06 主分类号 H03M1/06
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