SYSTEM FOR READING STATE OF PROCESSOR

摘要

PURPOSE:To attain proper diagnosis and restoration by providing a means for detecting an abnormal signal generated when a prescribed processor is faulty and reading sequentially the internal state of each processor as well as the said prescribed processor. CONSTITUTION:A master processor MCP0 and an alternative master processor MCP1 transmit an abnormal signal to a state signal line sl when a fault takes place in the inside. A state supervisory section SPU in a console CNS supervises the signal line sl and when the abnormal signal on the signal line sl from the MCP0 is detected, it is informed to a processor section MPU. The MPU identifies the MCP0 having a fault, a processor switching section SW is set to the MCP0 to read the internal state of the MCP0. When the read is finished, the internal state of the substitution processor MCP1 and call processing processors CNP0-CNPn is read sequentially by similar processes.