| 摘要 |
PURPOSE:To improve the service efficiency of a memory by providing an operational code jump circuit for calculating and generating a branch number suitable for the capacity of a processor when each instruction is to be branched to a corresponding processor depending on the content of an instruction resistor. CONSTITUTION:An instruction word read from memory 3 storing a sequential program is set at an instruction register 2, and divided into opecode and operand. The opecode is sent to an opecode jump circuit 5 to perform the branching action to change the address of a subsequent instruction word read from memory 3 by the result of actual instruction word. Opecode jump circuit 5 is calculated by gates 51, 52 in employing bits 15, 14 of the instruction register 2. The capacity of an order processor goes to 4 byte area when IR15, 14=1, 8 byte area when IR15=1 and IR14=0, and 16 byte area when IR15=0. |
