发明名称 |
SYSTEMS AND METHODS FOR PROVIDING DYNAMIC CACHE EXTENSION IN A MULTI-CLUSTER HETEROGENEOUS PROCESSOR ARCHITECTURE |
摘要 |
A dynamic cache extension in a multi-cluster heterogeneous processor architecture is described: a system includes a first processor cluster having a first level two (L2) cache and a second processor cluster having a second L2 cache. The system further comprises a controller in communication with the first and second L2 caches. The controller receives a processor workload input and a cache workload input from the first processor cluster. Based on processor workload input and the cache workload input, the cache controller determines whether a current task associated with the first processor cluster is limited by a size threshold of the first L2 cache or a performance threshold of the first processor cluster. If the current task is limited by the size threshold of the first L2 cache, the controller uses at least a portion of the second L2 cache as an extension of the first L2 cache. |
申请公布号 |
WO2016114961(A1) |
申请公布日期 |
2016.07.21 |
申请号 |
WO2016US12374 |
申请日期 |
2016.01.06 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
PARK, HEE JUN;VANKA, KRISHNA VSSSR;AMBAPURAM, SRAVAN KUMAR;AGARWAL, SHIRISH KUMAR;NAMJOSHI, ASHVINKUMAR;BHUTADA, HARSHAD |
分类号 |
G06F9/50;G06F12/08 |
主分类号 |
G06F9/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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