Memory cell with high-k charge trapping layer

摘要

A non-volatile storage device with memory cells having a high-k charge storage region, as well as methods of fabrication, is disclosed. The charge storage region has three or more layers of dielectric materials. At least one layer is a high-k material. The high-k layer(s) has a higher trap density as compared to Si3N4. High-k dielectrics in the charge storage region enhance capacitive coupling with the memory cell channel, which can improve memory cell current, program speed, and erase speed. The charge storage region has a high-low-high conduction band offset, which may improve data retention. The charge storage region has a low-high-low valence band offset, which may improve erase.

主权项

1. A non-volatile storage device, comprising:
a semiconductor channel; a tunnel dielectric region adjacent to the semiconductor channel, wherein the tunnel dielectric region comprises a first tunnel dielectric layer; a charge trapping region having a first charge trapping layer adjacent to the first tunnel dielectric layer, a second charge trapping layer, and a third charge trapping layer, wherein the second charge trapping layer is between the first and third charge trapping layers, wherein the second charge trapping layer has a smaller conduction band offset relative to the semiconductor channel than a conduction band offset of the first charge trapping layer relative to the semiconductor channel and has a smaller conduction band offset relative to the semiconductor channel than a conduction band offset of the third charge trapping layer relative to the semiconductor channel, wherein the first charge trapping layer has a smaller valance band offset relative to the semiconductor channel than a valance band offset of the first tunnel dielectric layer relative to the semiconductor channel, wherein the second charge trapping layer comprises a high-k material having a dielectric constant greater than 7.9; a control gate dielectric; and a control gate, wherein the control gate dielectric is between the control gate and the charge trapping region.