发明名称 DC BIAS DEPENDABILITY ELIMINATING CIRCUIT
摘要 PURPOSE:To eliminate DC bias dependability peculiar to a semiconductor in case of circuit integration by applying a constant-current bias to a part for receiving a signal by DC direct-coupling. CONSTITUTION:Current mirror circuits Ac, Bc receive through a resistance R1 a signal from a subscriber's terminal generated in terminals A, B, and the output is brought to current-voltage conversion by an emitter resistance RV signal converting transistors QTN, QTP, and outputted to voltage output terminals VOA, VOB. The bases of TRs QTN, QTP are connected to reference power sources VX, VY. Also, the collectors of TRs QTN, QTP are connected to current output terminals IOA, IOB, and a current proportional to voltage between the terminals A, B and a battery or a ground is outputted. In this case, constant-current sources IA, IB are connected to the emitters of the TRs QTN, QTP. In this way, DC bias dependability peculiar to a semiconductor by an integration can be eliminated, a load current is varied for a time, and it is utilized in case of circuit integration in which the allowance of characteristic variation is strict.
申请公布号 JPS59161192(A) 申请公布日期 1984.09.11
申请号 JP19830034382 申请日期 1983.03.04
申请人 OKI DENKI KOGYO KK;NIPPON DENSHIN DENWA KOSHA 发明人 TAWARA TOSHIYUKI;UEHARA HIROYASU;HAYASHI TOSHIO
分类号 H04Q3/42;H04M19/00 主分类号 H04Q3/42
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