发明名称
摘要 PURPOSE:To enable to obtain shallow ion implanted layers, and to contrive to form an element in a minute type and in high integration by a method wherein a process to implant ions as to make width of the distribution of implanted second ions to become larger than width of the distribution of implantation of first ion seeds is provided. CONSTITUTION:After field oxide films 2 are formed according to the manufacturing process of a p-channel MOSFET part, a gate electrode 4 consisting of polycrystalline Si is formed interposing a gate oxide film 3 between them. After then, prior to ion implantation of p<+> type impurities, Si<+> ions are implanted to form damage regions 5, 6 on the surface parts of the substrate of source and drain forming regions. After then, B<+> ions are implanted without performing heat treatment to form B ion implanted layers 7, 8 a little deeper than the damage regions 5, 6. After then, heat treatment is performed at 800 deg.C to activate impurities and to recover crystallizability of the implanted layers, and p<+> type layers 9, 10 to be used as a source and a drain are formed. After then, the whole surface is covered with a CVD SiO2 film, and contact holes are opened to adhere electrode wirings.
申请公布号 JPH0611034(B2) 申请公布日期 1994.02.09
申请号 JP19840108564 申请日期 1984.05.30
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SUGURO KYOICHI
分类号 H01L21/265;(IPC1-7):H01L21/265 主分类号 H01L21/265
代理机构 代理人
主权项
地址