| 摘要 |
PURPOSE:To design a device efficiently by maintaining a synchronization even if an error is generated in an universal synchronous even if an error is generated in an receiver/transmitter to which a stop bit is given by only a plus bit. CONSTITUTION:When a transmission circuit 10 is used, in an universal synchronous receiver/transmitter UART to which a stop bit is given by only a plus bit, an error is generated since a stop bit continuing to a data bit is minus. Since there is no synchronization slippage generated, a communication with the UART can be done. When a receiving circuit receives a signal, a normal receiving can be done, so that a smooth data transfer with the circuit 10 can be done. In this case, an information can be communicated with all of 8 bits D1 to D8. |
