发明名称 III-V Semiconductor structure and method of manufacture
摘要 <p>A manufacturable III-V semiconductor structure having small geometries is fabricated. A silicon nitride layer (12) is formed on a III-V semiconductor material (10) and a dielectric layer (13) comprised of aluminum is formed on the silicon nitride layer (12). Another dielectric layer (14) comprised of silicon and oxygen is formed over the dielectric layer (13) comprised of aluminum. The dielectric layer (13) comprised of aluminum acts as an etch stop for the etching of the dielectric layer (14) comprised of silicon and oxygen with a high power reactive ion etch. The dielectric layer (13) comprised of aluminum may then be etched with a wet etchant which does not substantially etch the silicon nitride layer (12). Damage to the surface of the semiconductor material (10) by exposure to the high power reactive ion etch is prevented by forming the dielectric layer (13) comprised of aluminum between the silicon nitride layer (12) and the dielectric layer (14) comprised of silicon and oxygen. &lt;IMAGE&gt;</p>
申请公布号 EP0688044(A2) 申请公布日期 1995.12.20
申请号 EP19950108175 申请日期 1995.05.29
申请人 MOTOROLA, INC. 发明人 CHO, JAESHIN;DURLAM, MARK;KYLER, KELLY W.;ABROKWAH, JONATHAN K.;CRONIN, WAYNE A.
分类号 H01L21/28;H01L21/033;H01L21/283;H01L21/338;H01L29/812;(IPC1-7):H01L21/28 主分类号 H01L21/28
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