发明名称 |
Method for fabricating MOS transistor having source/drain region of shallow junction and silicide film |
摘要 |
A method for fabricating an MOS transistor having a source/drain region of shallow junction and a thin silicide film is disclosed. The present method takes advantage of the phase separation of the Ti-excessed titanium nitride film and is capable of forming a thin silicide film in a once metal thermal annealing process. The method employs dopant implant to the titanium nitride and silicide and thermal anneal for diffusion to form source and drain regions.
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申请公布号 |
US5607884(A) |
申请公布日期 |
1997.03.04 |
申请号 |
US19940190664 |
申请日期 |
1994.02.02 |
申请人 |
LG SEMICON CO., LTD. |
发明人 |
BYUN, JEONG S. |
分类号 |
H01L29/78;H01L21/336;H01L27/08;(IPC1-7):H01L21/225;H01L21/335 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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