发明名称 Ram cell capable of storing 3 logic states
摘要 A memory circuit which enables storage of three logic states in a memory cell. Since the additional logic states may be used to represent additional information bits, this memory circuit increases the number of bits that may be stored per memory cell, thereby increasing the storage density and reducing the cost per bit. The disclosed memory circuit comprises an analog-to-digital converter coupled to detect a current through a transistor in a memory cell. The current is determined by the state of a tri-state flip-flop. By enabling the current to be detected as positive, negative, or zero, it becomes possible to represent more than one bit of information with the state of the flip-flop.
申请公布号 US5847990(A) 申请公布日期 1998.12.08
申请号 US19960779993 申请日期 1996.12.23
申请人 LSI LOGIC CORPORATION 发明人 IRRINKI, V. SWAMY;KAPOOR, ASHOK;LEUNG, RAYMOND T.;OWENS, ALEX;WIK, THOMAS R.
分类号 G11C11/41;G11C11/56;(IPC1-7):G11C11/00 主分类号 G11C11/41
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