| 摘要 |
<p>A PCM signal processing circuit records a predetermined number of PCM signals and also parity signals and a CRC signal after conversion into a signal having a data format conforming to the television signal with a VTR and detects the PCM signals from the reproduced signal from the VTR. In this PCM signal processing circuit, when the preset bit number of the PCM signals is greater than a reference bit number, the number of parity signals is reduced, and extra bit portions of the individual PCM signals are allotted to the vacant parity signal slot obtained as a result of the reduction of the parity signal number.</p> |
