发明名称 COMPLEMENTARY MOS INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To suppress the occurrence of a latchup phenomenon without increasing the number of photoworkings in the manufacturing steps by providing an N type epitaxial layer of high impurity density higher than a one conductive type (N type) substrate on the substrate and then forming a P type well reaching the substrate. CONSTITUTION:An N type epitaxial layer 12 having the same conductive type as an N type substrate 11 and an impurity density larger than the substrate 11 is grown on the substrate 11. The impurity density of the layer 12 is set by considering the surface density after forming a P type well formed later. A mask layer 13 of an oxide film is coated on a portion except a P type well forming region, and a P type well 14 is formed by an ion implantation or diffusion. The impurity density of the well 14 is so formed as to be low in the layer 12 and the maximum value in a substrate region deeper than the epitaxial layer. Such an impurity density distribution is formed to raise the base density of a parasitic vertical N-P-N type transistor, and the current amplification factor is accordingly decreased.
申请公布号 JPS60132358(A) 申请公布日期 1985.07.15
申请号 JP19830240303 申请日期 1983.12.20
申请人 NIPPON DENKI KK 发明人 MIZUSHIMA KAZUYUKI
分类号 H01L27/08;H01L21/8238;H01L27/092;H01L29/78 主分类号 H01L27/08
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