Apparatus for aligning instructions using predecoded shift amounts

摘要

A predecode unit within a microprocessor predecodes a cache line of instruction bytes for storage within the instruction cache of the microprocessor. The predecode unit produces multiple shift amounts, each of which identify the beginning of a particular instruction within the instruction cache line. The shift amounts are stored in the instruction cache with the instruction bytes, and are conveyed when the instruction bytes are fetched for execution by the microprocessor. An instruction alignment unit decodes the shift amounts to locate instructions within the fetched instruction bytes. Each shift amount directly identifies a corresponding instruction for dispatch, and therefore decoding the shift amount directly results in controls for shifting the instruction bytes such that the identified instruction is conveyed to a corresponding issue position. The number of shift amounts stored may be equal to the number of issue positions within the microprocessor. The instruction alignment unit scans the start and end byte predecode data (which is also provided by the predecode unit and stored in the instruction cache) to detect any additional instructions within the cache line (e.g. instructions not identified by the shift amounts). Additional shift amounts are generated and used by the instruction alignment unit to dispatch instructions during subsequent clock cycles.