发明名称 CACHE MEMORY
摘要 A cache memory (35) has a logical organisation in which its memory space is divided into sub-sections or partitions (P). This permits different data objects to be allocated to different partitions during the operation of the cache memory (35). Commands used by the cache memory (10) may contain an extra parameter which is used to identify the appropriate partition within the cache memory (35). The parameter is extracted from the command by a decoder (37) and is passed to a specific line of an equator set (38) which contains identifiers which determine the partition to be used. To minimise data collisions for a given partition size, a stride may be defined which expresses the separation of addresses and from which a mapping function can be selected which covers all addresses in the cache memory (35) in an efficient way.
申请公布号 WO0045269(A1) 申请公布日期 2000.08.03
申请号 WO2000GB00250 申请日期 2000.01.28
申请人 UNIVERSITY OF BRISTOL;MAY, MICHAEL, DAVID;MULLER, HENDRIK, LAMBERTUS 发明人 MAY, MICHAEL, DAVID;MULLER, HENDRIK, LAMBERTUS
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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