发明名称 LOGIC CIRCUIT PREVENTING OPERATION ANALYSIS AND LOGIC CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To make the illegal analysis of the operation of a logic circuit to be difficult and to apply the method of illegal analysis to a general logic circuit by changing the inner logic constitution of the logic circuit, in accordance with the outer control signal of a prescribed logic circuit. SOLUTION: A logic circuit 101 has logic gates G1,..., G4, G10, and G11, EXNOR gates G5,..., G9 and a NOT gate G12. The logic gates G1,..., and G4 are the logic gates, which can switch a two input NAND function and a two input NOR function by a control signal C. The logic gates G10 and G11 are the logic gates, which can switch a two input EXNOR function and a two input EXOR function by the control signal C. When the switching of the logic constitution is controlled, based on the control signal C of random numbers synchronized with input signals A1, A2 and Ci, an inner node signal can be changed at random.
申请公布号 JP2000151389(A) 申请公布日期 2000.05.30
申请号 JP19980333448 申请日期 1998.11.09
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 FUJII KOJI
分类号 G06F7/50;G06F7/501;G06F7/58;H03K19/20;H04L9/10 主分类号 G06F7/50
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