发明名称 |
Dual-gate structure and method of fabricating integrated circuits having dual-gate structures |
摘要 |
A method of fabricating a dual-gate on a substrate and an integrated circuit having a dual-gate structure are provided. A first high-K dielectric layer is formed in a first area defined for a first gate structure and in a second area defined for a second gate structure. A second high-K dielectric layer is formed in the first and second areas. The first high-K dielectric layer has a lower etch rate to an etchant relative to the second high-K dielectric layer. The second high-K dielectric layer is etched from the second area to said first high-K dielectric layer with the etchant, and a gate conductive layer is formed in the first and second areas over the second high-K dielectric layer and first high-K dielectric layer, respectively.
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申请公布号 |
US7271450(B2) |
申请公布日期 |
2007.09.18 |
申请号 |
US20050303530 |
申请日期 |
2005.12.16 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
HO TUO-HUNG;WANG MING-FANG;CHEN CHI-CHUN;YANG CHIH-WEI;YAO LIANG-GI;CHEN CHIH-CHANG |
分类号 |
H01L21/306;H01L29/94;H01L21/311;H01L21/336;H01L21/8234;H01L27/088;H01L29/78 |
主分类号 |
H01L21/306 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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