发明名称 BIAS CIRCUIT, AMPLIFIER, AND PORTABLE TERMINAL
摘要 PROBLEM TO BE SOLVED: To provide a bias circuit of low power consumption in which linearity can be enhanced while keeping stable and optimal bias conditions depending on the input signal. SOLUTION: A mirror circuit is constituted by a circuit composed of a grounded emitter bipolar transistor Q1 for signal amplification and a bias bipolar transistor Q2, and a circuit composed of a bipolar transistor Q3 for generating a reference voltage and a bipolar transistor Q4 for generating a reference voltage. Furthermore, a capacitor C1 is provided having one electrode connected with the base of the bias bipolar transistor Q2 and the other grounded. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008047978(A) 申请公布日期 2008.02.28
申请号 JP20060218969 申请日期 2006.08.10
申请人 SHARP CORP 发明人 KAWAMURA HIROSHI
分类号 H03F3/19 主分类号 H03F3/19
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