发明名称 ADDRESS CONVERTING SYSTEM
摘要 PURPOSE:To increase the program executing speed by carrying out the conversion of addresses at a high speed. CONSTITUTION:An upper part address space is decided well-definedly by a lower address conversion table 230. When the logical address of the data or the code contained in a shared upper part address space is converted, the coincidence is secured between the information on the head address of the table 230 and the information on the head address of the table 230 obtained from the 1st address conversion memory means instead of the coincidence between the logical address space identifiers in the 2nd address conversion memory means. Thus >=2 pieces of address conversion information on each lower part address space in a shared upper part address space within the 2nd address conversion memory. Thus the availability of the 2nd address conversion buffer is improved. While the 1st address conversion memory means can be handles as conventional and therefore the availability of this memory means is also improved.
申请公布号 JPS62182854(A) 申请公布日期 1987.08.11
申请号 JP19860025128 申请日期 1986.02.06
申请人 NEC CORP 发明人 NANBA SHINJI
分类号 G06F12/10 主分类号 G06F12/10
代理机构 代理人
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