| 摘要 |
PROBLEM TO BE SOLVED: To provide an automatic synchronization correction circuit capable of establishing frame synchronization with a desired master unit, facilitating the timing control of a timing for performing conversion to a TDMA-TDD system and improving operability. SOLUTION: Based on one or more signals of four signals outputted from a UW(unique word) normality detection circuit 1, a CRC(cyclic redundancy check) normality detection circuit 2, a reception data normality detection circuit 3 and a reception electric field judgement circuit 4, a frame synchronization correction factor generation circuit 5 judges whether or not a set condition is satisfied. When it is satisfied, frame synchronization establishment factor signals 110 are outputted to a TDMA-TDD timing control circuit 7 and the timing control of TDMA-TDD is executed. |
