| 摘要 |
PCT No. PCT/SE96/00286 Sec. 371 Date Aug. 19, 1997 Sec. 102(e) Date Aug. 19, 1997 PCT Filed Mar. 4, 1996 PCT Pub. No. WO96/28781 PCT Pub. Date Sep. 19, 1996The invention comprises an integrated circuit arrangement (1) with several internal-related function blocks (such as 42) and edge-related bond pads (2 . . . 2k; 3 . . . 3k), whereby each of several selected pads is equipped with a test cell (2' . . . 2k'; 3' . . . 3k'); a first test cell for incoming signal structures at a first set of pads; and a second test cell (3k') for outgoing signal structures at a second set of pads. The test cells can, through internal connecting conductors, be connected to at least one function block (42). Each second test cell (3k') is equipped with a multiplexer (31), which can be controlled by means of a mode-selecting signal (32) to pass along either a signal pattern (43b1) that relates to a function block, or a signal pattern (33) that is received from a selected function block, in the form of a test signal. Each second test cell (3k') is equipped with an added multiplexer (38) where the output is, directly (or indirectly), connected to a test signal-related input of said multiplexer (31). A test signal (42b1), which originates from a function block that has been selected to be tested, is connected to at least one input of said added multiplexer (38). Said added multiplexer (38) may also be controlled by means of a mode-selecting signal (38a).
|
