| 摘要 |
A clock generator for automatic test equipment generates clock signals from a reference clock. To generate a desired clock signal, a clock generator produces a time-quantized signal having a period equal to an integer number of reference clock periods and equal to the desired clock period, plus or minus a quantization error. For each cycle of the desired clock signal, a noise-shaping requantizer processes the quantization error to generate noise-shaping signals. The noise-shaping signals then establish delay values of a variable pipeline delay. The variable pipeline delay adjusts each period of the time-quantized signal by an integer number of reference clock cycles, based upon the noise-shaped signals. The effect of noise shaping the quantization error and selectively delaying the time-quantized signal is to shift jitter in the time-quantized signal from relatively low frequencies to relatively high frequencies, which can be filtered with a phase-locked loop. |
