PERIPHERAL COMPONENT INTERCONNECT EXPRESS DEVICES WITH EFFICIENT MEMORY MAPPING

摘要

Embodiments herein provide for efficient memory mapping in a PCIe device when a host changes memory allocations in the device. One PCIe device comprises a plurality of Base Address Registers (BARs) defined by the host. The device also includes a processor with an address space. The processor maps addresses of the address space to the BARs for routing PCIe packets from the host. The processor can determine that the host is reconfiguring the BARs, and, based on the determination, mark packets existing in the computer memory as old, change the BARs in the computer memory as directed by the host, mark packets received after the BAR change as new, process the old packets from the computer memory based on their addresses of the address space until a new packet is reached, and to remap the BARs to the addresses of the address space after the new packet is reached.

主权项

1. A Peripheral Component Interconnect Express (PCIe) device operable to couple to a host system, comprising:
computer memory configured with a plurality of Base Address Registers (BARs) defined by the host system; and a processor communicatively coupled to the computer memory and comprising an address space, wherein the processor is operable to map addresses of the address space to the BARs for routing PCIe packets from the host system, to determine that the host system is reconfiguring the BARs in the computer memory, and based on the determination, to mark PCIe packets existing in the computer memory as old, to change the BARs by reallocating the computer memory as directed by the host system, to mark PCIe packets received after the BAR change as new, to process the old PCIe packets from the computer memory based on their addresses of the address space until a new PCIe packet is reached, and to remap the BARs to the addresses of the address space after the new PCIe packet is reached.