Method, device and system for controlling execution of an instruction sequence in a data stream accelerator

摘要

Techniques and mechanisms for controlling execution of an instruction sequence in a data stream processing engine. In an embodiment, a control unit of the data stream processing engine detects that execution of a first instruction in an instruction sequence has ended. In another embodiment, the control unit determines information regarding a next instruction of the instruction sequence which is to be executed. Control signals may be sent from the control unit to form a data path set for execution of the next instruction in the instruction sequence.

主权项

1. An integrated circuit for operation in a data stream processing engine (DSPE) of an accelerator, the integrated circuit comprising:
an instruction sequencer to detect a first control signal sent from a data path module of the DSPE to the integrated circuit, the first control signal indicating that the data path module has completed an execution of a first instruction in a sequence of instructions for a data processing task, the first instruction to perform multiple atomic operations; and a control signal generator coupled to receive instruction information sent from the instruction sequencer in response to the first control signal, the instruction information indicating that a second instruction is a next instruction in the sequence of instructions to be executed, the second instruction to perform multiple atomic operations, the control signal generator to send to the data path module a plurality of control signals based on the instruction information, the plurality of control signals for multiple data processing units (DPUs) of the data path module to form a set of one or more data paths corresponding to the second instruction.