发明名称 Direct-transfer marching memory and a computer system using the same
摘要 A direct-transfer marching memory includes an array of memory units, each of the memory units having a sequence of bit-level cells so as to store information of byte size or word size, the information of byte size or word size is transferred synchronously, step by step, along a direction orthogonal to a direction of the sequence of bit-level cells, each of the bit-level cells encompassing an electron-storage region configured to accumulate cell-electrons. The cell-electrons accumulated in an electron-storage region in a subject memory unit is directly transferred to an adjacent electron-storage region, which is assigned in the next memory unit adjacent to the subject memory unit, the transfer of the cell-electrons is directly controlled by control signals, without using a combinational function of a logic gate circuit.
申请公布号 US9449696(B2) 申请公布日期 2016.09.20
申请号 US201514877557 申请日期 2015.10.07
申请人 Nakamura Tadao;Flynn Michael J. 发明人 Nakamura Tadao;Flynn Michael J.
分类号 G11C16/04;G11C16/10;G11C19/28;G11C19/18;G11C16/32 主分类号 G11C16/04
代理机构 代理人 Snyder Barley
主权项 1. A direct-transfer marching memory including an array of memory units, each of the memory units having a sequence of bit-level cells so as to store information of byte size or word size, the information of byte size or word size is transferred synchronously, step by step, along a direction orthogonal to a direction of the sequence of bit-level cells, each of the bit-level cells comprising an electron-storage region configured to accumulate cell-electrons, wherein the cell-electrons accumulated in one of the electron-storage regions in a subject memory unit is directly transferred to an adjacent electron-storage region, which is assigned in the next memory unit adjacent to the subject memory unit, the transfer of the cell-electrons is directly controlled by control signals, without using a combinational function of a logic gate circuit.
地址 Miyagi JP